Instruction Set Architecture (ISA)

Instruction Set Architecture (ISA)

• Instruction Set Architecture (ISA) usually defines a "family" of microprocessors. Examples: Intel x86 (IA32), Sun Sparc, DEC Alpha, IBM/360, IBM PowerPC, M68K, DEC VAX

• It defines the interface between hardware and low-level software.

• ISA includes an Instruction set, rules for using instructions, mnemonics, functionality, addressing modes, and instruction encoding.

• Maintaining the instruction set architecture as a constant enables many implementations of that architecture.

• To achieve the highest performance and conserve energy, an instruction set architecture must have a sufficient number of registers and compilers must use registers efficiently.

• MIPS is an implementation of a RISC architecture.

• MIPS instruction set architecture has a small set of instructions and addressing modes. It is designed for use with high-level programming languages.

• MIPS instruction set architecture allows for parallel execution. It minimizes the amount of work (computation and data flow) per instruction.

• MIPS instruction set architecture provides a large register set, minimizing main memory access.

• MIPS instruction set architecture has fixed instruction width (32-bits) and a small set of uniform instruction encodings which minimizes control complexity and allows for more registers.

• MIPS instructions can be categorized as :

• Arithmetic/logical/shift/comparison

• Control instructions (branch and jump)

• Load/store

• Other (exception, register movement to/from GP registers, etc.)

• MIPS instruction set architecture has three instruction encoding formats: R-type, I-type and J-type.

Review Questions

1. What is instruction set architecture?

2. List the features of MIPS instruction set architecture.