Forward Biased PN Junction

FORWARD BIASED PN JUNCTION

We connect voltage source to the PN junction, such that the positive terminal is connected to the P-region and negative terminal to the N-region, the PN junction is said to be forward biased as shown in Figure 3.23.

When PN junction is forward biased as shown in Figure 3.23 (a). The holes are repelled by the positive terminal of the voltage source and are forced to move towards the junction. Similarly, the electrons are repelled by the negative terminal of the voltage source and move towards the junction. Because of their acquired energy, some of the holes and electrons enter the depletion layer and recombine themselves. This reduces the width as well as height of the potential barriers (V_B) as shown in figure 3.23 (b). In other wards, the width of depletion layer and the barrier potential reduces with the forward bias.

As a result of this, more majority carriers diffuse across the junction. Therefore is causes a large current to flow through the PN junction.

Effect of Barrier Potential on the Forward Biased PN Junction

The barrier potential of the depletion layer can be considered as a small battery, which opposes the external DC voltage as shown in Figure 3.24.

The resistance R_p and R_n represent the bulk resistance of the P-type and N- type semiconductors.

The PN junction does not permit the current to flow, until the external bias voltage overcomes the barrier potential (V>V_B). For example, silicon PN junction, does not conduct as long as the external applied voltage is below 0.7 V.